Charles Rothrauff

Principal Design Engineer

Chuck Rothrauff brings to Quasar over 25 years of hardware and software design experience including startup positions at five technology based corporations. Mr. Rothrauff was the sole designer of 5 ASICs, countless FPGAs and numerous software solutions for leading-edge communications and signal processing products. In his current position, Mr. Rothrauff is involved in the development of a WiMAX radio where he designed an FPGA, real-time embedded software for three processors and an application GUI for management and control.  Before joining Quasar, Mr. Rothrauff worked for Tellabs via the Vinci Systems acquisition where he designed the BPON MAC ASIC that is currently deployed in over 2 million residential ONTs in the Verizon FiOS network. In previous roles, Mr. Rothrauff has held Director, Principal and Senior Hardware Design positions at Advanced Switching Communications, Transtream, Alcatel Data Networks, Sprint International, Digital Access, LICOM and GTE BCS/Telenet.

Mr. Rothrauff received a Bachelor of Science in Electrical Engineering from Virginia Tech and holds one patent along with several other pending applications.

Dan Friel

Principal Engineer

 Dan has over 20 years of engineering design, product development and management experience in the telecom and commercial areas.  Dan received his Bachelor of Engineering in Electrical Engineering from McMaster University and his Master of Engineering in Telecommunications from George Washington University. Dan has extensive experience in the design of FPGAs(Xilinx/Altera), communication protocols and the HW product development cycle from inception to production. Currently working on advanced Xilinx silicon families, implementing DSP/PCIe/DDR2  and embedded system  designs. Previously working on FPGA implementations of a 10G RPR (Resilient Packet Ring) Traffic Manager,  RapidIO Endpoint and TigerSHARC interfaces.

Prior to Quasar, Dan was a Manager of HW Development for Tellabs Advanced Products group were he led the HW development of boards/FPGAs for IMA/Circuit Emulation/OC48 GFP VCAT.  Previous to this, Dan was a Principle Engineer/Manager for Ocular/Tellabs where he managed the development of OC3/DS3 boards and designed FPGAs for SONET applications. Dan has also been a Principle Engineer/Manager in HW development teams for companies such as,  IPOptical, FastComm and Alcatel Data Networks.

Debra Sessler

Software Engineer

Debra Sessler has worked in Systems Engineering and Software Engineering for over 20 years.  During this time she has provided software design, development, and validation for both commercial and military systems.  Ms. Sessler has worked with embedded systems for the past 10 years.  During this time she has developed device drivers, hardware support utilities, and VxWorks board support packages.  Most recently Debra has done embedded development under Linux.  Ms. Sessler holds a Bachelor of Science degree in Computer Science from James Madison University.

Jeff Nicoll

Senior Design Engineer

Jeff Nicoll has 27 years of hardware development experience. Mr. Nicoll received his Bachelor of Science in Electrical Engineering Technology from Virginia Tech. His recent experience includes control of a large Flash memory array, implementation of several signal decoders (including several different types of convolution coding and block encoding), and variants of CameraLink interfaces.  Other recent work includes:  a design to maintain Sonet timing alignment between physically separated systems; a Sonet VT1.5 insertion and extraction device for internal testing; a Motorola PowerQUICC-based design for Ethernet and T3 front end for a Sonet interface; development of a SHARC-based controller for an imaging satellite; and a DVB (Digital Video over Broadband) interface. Most recent designs have required significant Xilinx or Altera designs. Former employers have been Tellabs and Ocular Networks. Prior to that, Mr. Nicoll was a founder of NovaEDA, a successful contract design group, much like Quasar Systems. Earlier experience includes several Motorola CPU-based designs for Netrix and Alcatel Data Networks.

Jeff Noel

Senior Design Engineer

Jeff Noel has over 25 years of experience in architecting and implementing real time embedded software and hardware systems.  He has extensive experience in commercial and military environments, with emphasis on telecommunications systems and digital signal processing.  Prior to Quasar, Mr. Noel designed software for Optical Network Terminals (ONT) at Tellabs and Vinci Systems (which was acquired by Tellabs).  Previous to that, he was lead software architect for echo cancellation products at Coherent Communications, which was also acquired by Tellabs.  Earlier, he was VP of Engineering at Summit Technology, a contracting company specializing in military products where he was responsible for both hardware and software.  Mr. Noel received a Bachelor of Science in Electrical Engineering degree from West Virginia University Institute of Technology.

Mr. Noel has authored numerous patents in the fields of data communications and Passive Optical Networking (PON).

Jon Partee

Senior Design Engineer

Jon Partee has over 10 years of embedded hardware design experience involved with the aerospace / military and telecommunications industries.  Mr. Partee received his Bachelor of Science in Electrical Engineering from the Rochester Institute of Technology.  Mr. Partee was responsible for the detailed design and implementation of the Performance Technologies ATC6640 -- selected as Internet Telephony’s 2006 product of the Year.  Prior to Performance Technologies, Mr. Partee was involved with the development and design of the Single Board Computer and the DSP Champ AV products at Curtiss-Wright Controls Embedded Computing.  While at Curtiss-Wright, Mr. Partee was awarded the 2003 Technology Innovation Award for creating a method to synthesize the FPGA and their associated SW device drivers. Mr. Partee’s telecom experience includes the development of commercial DS3, OC-3, OC-12 ATM switches and T1/E1, DS3/E3, OC-3, OC-12 ATM/Frame Relay/AAL2 switches at Advanced Switching Communications and Hyundai Network Systems.